The present invention relates to a frequency synthesizer having automatic control of loop bandwidth selection to generate a synthesized frequency signal, generally referred to as autobandwidth control, and more particularly, to an apparatus and method of operating the frequency synthesizer with improved features of autobandwidth control.
A frequency synthesizer generally includes at least one phase lock loop comprising the elements of a phase detector, charging circuit, a storage device including a capacitive element, a voltage controlled oscillator, and a frequency divider network. In operation, the phase detector is governed by a very stable reference frequency signal and a feedback frequency signal to generate at least one control signal which governs the charging circuit to source or sink current to and from a capacitive element at a current level (loop bandwidth) to adjust the voltage across the capacitive element of the storage device. The voltage controlled oscillator generates a synthesized frequency signal proportional in frequency to the adjusted voltage. The frequency divider network divides the synthesized frequency down to the feedback frequency signal.
In a programmable frequency synthesizer, the frequency of the synthesized frequency signal may be dynamically set by programming the frequency divider network with a coded digital word. Accordingly, a phase lock loop of the frequency synthesizer may be randomly switched to a new synthesized frequency signal by programming a different digitally coded word into the frequency divider network.
Each time the phase lock loop is dynamically set to generate a new synthesized frequency signal, the feedback frequency signal is caused to deviate in phase and frequency from the reference frequency signal initially and then relocked thereto within a time interval dictated by the loop bandwidth setting of the phase lock loop. In most phase lock loops, the loop bandwidth is established by setting as one variable the current level which the charging circuit uses to adjust the voltage across the capacitive element of the storage device. Most contemporary frequency synthesizers operate with two loop bandwidths or commensurate current level settings. A first or low loop bandwidth (i.e. low current level setting) is generally established to maintain lock of the synthesized frequency signal to a current synthesized frequency setting. This low setting offers filtering and stability to reduce substantially synthesized frequency jittering as a result of electrical noise either self-induced or otherwise.
However, the low current level setting is not considered adequate for relocking the current synthesized frequency signal to a new frequency setting because, in most applications, the relock time is required to be held to a minimum. Thus, for these purposes, a second or wider loop bandwidth setting may be selected in accordance with the relocking operational state of the phase lock loop.
Examples of contemporary phase lock loops having dual loop bandwidth settings are shown and described in the following U.S. Patents:
(1) U.S. Pat. No. 4,167,711 entitled "Phase Detector Output Stage for Phase Locked Loop" issued to George Smoot on Sept. 11, 1979, and
(2) U.S. Pat. No. 4,771,249 entitled "Phase Locked Loop Having a Filter with Controlled Variable Bandwidth" issued to Burch et al. on Sept. 13, 1988,
both patents being assigned to the same assignee as the instant application.
More particularly, Burch et al. is directed to an autobandwidth control circuit which operates to switch automatically from the low to the high loop bandwidth state when two successive phase indications of one of the reference and feedback frequency signals occur between successive phase indications of the other frequency signal where each of the reference and feedback frequency signals include only one phase indication per frequency period. Further, the Burch autobandwidth control circuit operates to switch back from the high to low loop bandwidth state only after three frequency transitions of the feedback frequency signal about the reference frequency signal occurs.
One drawback of this type of autobandwidth controller is its sensitivity to small perturbations of phase shifts of the feedback frequency signal during "lock" which may be caused by externally coupled noise or even, internal noise which may occur in the voltage controlled oscillator. For example, in the autobandwidth control circuit of Burch et al., it does not require much phase shift during "lock" to cause a switch from low to high loop bandwidth states. Accordingly, once inadvertently switched to the high loop bandwidth state, Burch et al. requires three frequency transitions before the controller can cause a return to the proper low loop bandwidth state.
Another drawback concerns power saving, particularly when the frequency synthesizer is utilized in a battery powered electronic device. For example, this type of autobandwidth control requires high current levels through multiple transitions of frequency differences as described above before switching to a lower current level which condition imposes a heavy and undesirable drain on the battery for a not insubstantial period of time. Accordingly, these periods of heavy drain on the battery may lead to shorter battery life cycle.
These and other drawbacks are ameliorated by the present invention which includes an embodiment having an improved set of criteria for the automatic selection of loop bandwidth states. The advantages of the present invention shall become more readily apparent from the description of a preferred embodiment thereof found hereinbelow taken together with the illustrations of the drawings of the instant application.